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Revert "drm/i915/tgl: Add extra hdc flush workaround"
authorCaz Yokoyama <caz.yokoyama@intel.com>
Wed, 4 Mar 2020 22:13:59 +0000 (14:13 -0800)
committerJosé Roberto de Souza <jose.souza@intel.com>
Thu, 12 Mar 2020 22:19:00 +0000 (15:19 -0700)
commit175c4d9b3b9a60b4ea0b8cd034011808c6a03b05
treed975793b5753720c2a9f2d5365fe8e9f893f73f2
parent22ca8a452e5791c9721e1ba61e95651fc00a9e4d
Revert "drm/i915/tgl: Add extra hdc flush workaround"

This reverts commit 36a6b5d964d995b536b1925ec42052ee40ba92c4.

The commit takes care Wa_1604544889 which was fixed on a0 stepping based on
a0 replan. So no SW workaround is required on any stepping now.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Caz Yokoyama <caz.yokoyama@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Fixes: 36a6b5d964d9 ("drm/i915/tgl: Add extra hdc flush workaround")
Link: https://patchwork.freedesktop.org/patch/msgid/1c751032ce79c80c5485cae315f1a9904ce07cac.1583359940.git.caz.yokoyama@intel.com
drivers/gpu/drm/i915/gt/intel_lrc.c