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[PowerPC] fix potential verification errors on CFENCE8
authorHiroshi Inoue <inouehrs@jp.ibm.com>
Thu, 15 Jun 2017 16:51:28 +0000 (16:51 +0000)
committerHiroshi Inoue <inouehrs@jp.ibm.com>
Thu, 15 Jun 2017 16:51:28 +0000 (16:51 +0000)
commit1a33599c525328e554f933aee14aae3392e83309
tree0560c0bb3cbde7b3d81327e6feb0dfb203062ff9tree | snapshot
parentb0fa17fec78f5d7120277611b55afd47887601dacommit | diff
[PowerPC] fix potential verification errors on CFENCE8

This patch fixes a potential verification error (64-bit register operands for cmpw) with -verify-machineinstrs.

Differential Revision: https://reviews.llvm.org/D34208

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305479 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCInstrInfo.cpp diff | blob | history
test/CodeGen/PowerPC/atomic-2.ll diff | blob | history
test/CodeGen/PowerPC/atomics-constant.ll diff | blob | history
test/CodeGen/PowerPC/atomics-regression.ll diff | blob | history
external/llvm
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