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[X86][AVX512] Improve lowering of AVX512 compare intrinsics (remove redundant shift...
authorAyman Musa <ayman.musa@intel.com>
Thu, 15 Jun 2017 13:02:37 +0000 (13:02 +0000)
committerAyman Musa <ayman.musa@intel.com>
Thu, 15 Jun 2017 13:02:37 +0000 (13:02 +0000)
commit1abb66152a205f979ddb757f7d9c0e9a17371384
tree5800bac9201c550785a47ee9760e91c8b0bbae8a
parent670bbd6f43f2cdeae65e87baa24ac63ddc9f385e
[X86][AVX512] Improve lowering of AVX512 compare intrinsics (remove redundant shift left+right instructions).

AVX512 compare instructions return v*i1 types.
In cases where the number of elements in the returned value are less than 8, clang adds zeroes to get a mask of v8i1 type.
Later on it's replaced with CONCAT_VECTORS, which then is lowered to many DAG nodes including insert/extract element and shift right/left nodes.
The fact that AVX512 compare instructions put the result in a k register and zeroes all its upper bits allows us to remove the extra nodes simply by copying the result to the required register class.

When lowering, identify these cases and transform them into an INSERT_SUBVECTOR node (marked legal), then catch this pattern in instructions selection phase and transform it into one avx512 cmp instruction.

Differential Revision: https://reviews.llvm.org/D33188

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305465 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86InstrAVX512.td
test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
test/CodeGen/X86/avx512vl-vec-masked-cmp.ll [new file with mode: 0644]
test/CodeGen/X86/compress_expand.ll
test/CodeGen/X86/masked_memop.ll