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[X86][AVX512] Add combine for TESTM
authorGuy Blank <guy.blank@intel.com>
Sun, 13 Aug 2017 08:03:37 +0000 (08:03 +0000)
committerGuy Blank <guy.blank@intel.com>
Sun, 13 Aug 2017 08:03:37 +0000 (08:03 +0000)
commit1bdf83db431849540b24779c701ab06598841ad8
tree660335e6af1ac3aad2940b7883acc433514e8828tree | snapshot
parentec9eb8644dce597eba339778b5db74dd54181a42commit | diff
[X86][AVX512] Add combine for TESTM

Add an X86 combine for TESTM when one of the operands is a BUILD_VECTOR(0,0,...).

TESTM op0, BUILD_VECTOR(0,0,...) -> BUILD_VECTOR(0,0,...)
TESTM BUILD_VECTOR(0,0,...), op1 -> BUILD_VECTOR(0,0,...)

Differential Revision:
https://reviews.llvm.org/D36536

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310787 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp diff | blob | history
test/CodeGen/X86/avx512vl-vec-masked-cmp.ll diff | blob | history
external/llvm
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