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[InstCombine] squash is-not-power-of-2 using ctpop
authorSanjay Patel <spatel@rotateright.com>
Mon, 24 Jun 2019 22:35:26 +0000 (22:35 +0000)
committerSanjay Patel <spatel@rotateright.com>
Mon, 24 Jun 2019 22:35:26 +0000 (22:35 +0000)
commit1c6a395c06fe7ee95bfe28a06647d7028e6ef1e4
treec9789bc76ab94b64b71ee1388b41c2e214df5e3e
parent931775983c3706c7fcbf7f0f777dcfcf587b0f87
[InstCombine] squash is-not-power-of-2 using ctpop

This is the Demorgan'd 'not' of the pattern handled in:
D63660 / rL364153

This is another intermediate IR step towards solving PR42314:
https://bugs.llvm.org/show_bug.cgi?id=42314

We can test if a value is not a power-of-2 using ctpop(X) > 1,
so combining that with an is-zero check of the input is the
same as testing if not exactly 1 bit is set:

(X == 0) || (ctpop(X) u> 1) --> ctpop(X) != 1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364246 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
test/Transforms/InstCombine/ispow2.ll