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[X86][SSE] Enable commutation from MOVSD/MOVSS to BLENDPD/BLENDPS on SSE41+ targets
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Sat, 1 Oct 2016 14:26:11 +0000 (14:26 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Sat, 1 Oct 2016 14:26:11 +0000 (14:26 +0000)
commit1c8d24e339205522c3e73d183d500c14aeb34098
treeae30152a7422cd2e6a5ffcdcd77ca400b4c2b5c7
parentf4f54510a1cb9b91f515e7f476b1b2d35e8dc6e5
[X86][SSE] Enable commutation from MOVSD/MOVSS to BLENDPD/BLENDPS on SSE41+ targets

Instead of selecting between MOVSD/MOVSS and BLENDPD/BLENDPS at shuffle lowering by subtarget this will help us select the instruction based on actual commutation requirements.

We could possibly add BLENDPD/BLENDPS -> MOVSD/MOVSS commutation and MOVSD/MOVSS memory folding using a similar approach if it proves useful

I avoided adding AVX512 handling as I'm not sure when we should be making use of VBLENDPD/VBLENDPS on EVEX targets

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283037 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrInfo.cpp
lib/Target/X86/X86InstrSSE.td
test/CodeGen/X86/f16c-intrinsics-fast-isel.ll
test/CodeGen/X86/sse-scalar-fp-arith.ll
test/CodeGen/X86/vec_ss_load_fold.ll
test/CodeGen/X86/vector-shuffle-128-v2.ll
test/CodeGen/X86/vector-shuffle-128-v4.ll