OSDN Git Service

drm/i915/guc: Properly capture & release GuC interrupts on Gen11+
authorDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Tue, 5 Nov 2019 22:53:21 +0000 (14:53 -0800)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 14 Nov 2019 23:04:36 +0000 (23:04 +0000)
commit1cdc2330e8d396c9cbebfc75fba4c94d34f80782
treeb0429c4516eb54e8a43140420d5db3726078051b
parent980f87a2edb3e7825949ebd0a7e63ab574c20816
drm/i915/guc: Properly capture & release GuC interrupts on Gen11+

With the new interrupt re-partitioning in Gen11, GuC controls by itself
the interrupts it receives, so steering bits and registers have been
defeatured. Being this the case, when the GuC is in control of
submissions we won't know what to do with the ctx switch interrupt
in the driver, so disable it.

v2 (Daniele): replace the gen9 paths instead of keeping gen9 and gen11
functions since we won't support guc submission on any pre-gen11 platform.

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191105225321.26642-1-daniele.ceraolospurio@intel.com
drivers/gpu/drm/i915/gt/intel_rps.c
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c