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(parent: 1a66e50) | patch
cxgb4: Fix endianness issue in t4_fwcache()
authorGanesh Goudar <ganeshgr@chelsio.com>
Fri, 14 Sep 2018 09:06:27 +0000 (14:36 +0530)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 25 Nov 2019 14:53:58 +0000 (15:53 +0100)
commit1f6a7105b15be93b5ee84039d8466fb6e7a61004
tree43394b2eef2fe316fad689147a3559c4dc14d121tree | snapshot
parent1a66e50c45e6abb6fc14509a44d2eb210f7f2957commit | diff
cxgb4: Fix endianness issue in t4_fwcache()

[ Upstream commit 0dc235afc59a226d951352b0adf4a89b532a9d13 ]

Do not put host-endian 0 or 1 into big endian feild.

Reported-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c diff | blob | history
Mirror: https://github.com/0ranko0P/kernel_xiaomi_msm8998/
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