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Add function attribute "patchable-function-prefix" to support -fpatchable-function...
authorFangrui Song <maskray@google.com>
Mon, 20 Jan 2020 22:57:11 +0000 (14:57 -0800)
committerFangrui Song <maskray@google.com>
Fri, 24 Jan 2020 01:02:27 +0000 (17:02 -0800)
commit22467e259507f5ead2a87d989251b4c951a587e4
tree6e6abbe968f68f19b18815431fb7a6d617f1eac3
parentf394d22fa82df03eaf72bf1876e2d63bbe6cd00f
Add function attribute "patchable-function-prefix" to support -fpatchable-function-entry=N,M where M>0

Similar to the function attribute `prefix` (prefix data),
"patchable-function-prefix" inserts data (M NOPs) before the function
entry label.

-fpatchable-function-entry=2,1 (1 NOP before entry, 1 NOP after entry)
will look like:

```
  .type foo,@function
.Ltmp0:               # @foo
  nop
foo:
.Lfunc_begin0:
  # optional `bti c` (AArch64 Branch Target Identification) or
  # `endbr64` (Intel Indirect Branch Tracking)
  nop

  .section  __patchable_function_entries,"awo",@progbits,get,unique,0
  .p2align  3
  .quad .Ltmp0
```

-fpatchable-function-entry=N,0 + -mbranch-protection=bti/-fcf-protection=branch has two reasonable
placements (https://gcc.gnu.org/ml/gcc-patches/2020-01/msg01185.html):

```
(a)         (b)

func:       func:
.Ltmp0:     bti c
  bti c     .Ltmp0:
  nop       nop
```

(a) needs no additional code. If the consensus is to go for (b), we will
need more code in AArch64BranchTargets.cpp / X86IndirectBranchTracking.cpp .

Differential Revision: https://reviews.llvm.org/D73070
llvm/include/llvm/CodeGen/AsmPrinter.h
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
llvm/lib/IR/Verifier.cpp
llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
llvm/lib/Target/ARM/ARMMCInstLower.cpp
llvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll
llvm/test/CodeGen/AArch64/patchable-function-entry.ll
llvm/test/Verifier/invalid-patchable-function-entry.ll