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[X86] Fix schedule-x86_64.s tests to use different registers in reg-reg cases
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 8 Jun 2018 16:40:15 +0000 (16:40 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 8 Jun 2018 16:40:15 +0000 (16:40 +0000)
commit2251f252bef6e52536f98abea52c92f5348a6010
tree1ea5ce1b1a4de7b56a4386522a7fb1e7151f7c7ctree | snapshot
parent8fbd41bc43916098d522f26a3e4bbfc9790578fbcommit | diff
[X86] Fix schedule-x86_64.s tests to use different registers in reg-reg cases

Same fix as rL334110: I noticed while working on zero-idiom + dependency-breaking support (PR36671) that most of our binary instruction schedule tests were reusing the same src registers, which would cause the tests to fail once we enable scalar zero-idiom support on btver2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334302 91177308-0d34-0410-b5e6-96231b3b80d8
test/CodeGen/X86/schedule-x86_64.ll diff | blob | history
external/llvm
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