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serial: stm32: fix TX and RX FIFO thresholds
authorErwan Le Ray <erwan.leray@foss.st.com>
Thu, 4 Mar 2021 16:22:59 +0000 (17:22 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 10 Mar 2021 08:34:10 +0000 (09:34 +0100)
commit25a8e7611da5513b388165661b17173c26e12c04
tree1b6efb10fc4628895ece9004ba50ac2012a84de4
parentf264c6f6aece81a9f8fbdf912b20bd3feb476a7a
serial: stm32: fix TX and RX FIFO thresholds

TX and RX FIFO thresholds may be cleared after suspend/resume, depending
on the low power mode.

Those configurations (done in startup) are not effective for UART console,
as:
- the reference manual indicates that FIFOEN bit can only be written when
  the USART is disabled (UE=0)
- a set_termios (where UE is set) is requested firstly for console
  enabling, before the startup.

Fixes: 84872dc448fe ("serial: stm32: add RX and TX FIFO flush")
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Link: https://lore.kernel.org/r/20210304162308.8984-5-erwan.leray@foss.st.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/tty/serial/stm32-usart.c