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[X86][SandyBridge] Additional updates to the SNB instructions scheduling information
authorGadi Haber <gadi.haber@intel.com>
Sun, 13 Aug 2017 13:59:24 +0000 (13:59 +0000)
committerGadi Haber <gadi.haber@intel.com>
Sun, 13 Aug 2017 13:59:24 +0000 (13:59 +0000)
commit276031051e29ca01086a7b76617589a7e4e03fdf
tree3df8b672551784a06cb222d9c40e52566d865417
parent2fee386cb8c5237f5ed05f022119ec74e12cdd68
[X86][SandyBridge] Additional updates to the SNB instructions scheduling information

This is a continuation patch for commit r307529 which completely replaces the scheduling information for the SandyBridge architecture target by modifying the file X86SchedSandyBridge.td located under the X86 Target (see also https://reviews.llvm.org/D35019).

In this patch we added the scheduling information of additional SNB instructions that were missing from the patch commit r307529, fixed the scheduling of several resource groups that include only port0 instead of port05 (i.e., port0 OR port5) and fixed several incorrect instructions' scheduling in the r307529 commit.

The patch also includes the X87 instructions which were missing in previous patch commit r307529 as reported in bugzilla bug 34080.

Reviewers: zvi, RKSimon, chandlerc, igorb, m_zuckerman, craig.topper, aymanmus, dim

Differential Revision: https://reviews.llvm.org/D36388

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310792 91177308-0d34-0410-b5e6-96231b3b80d8
12 files changed:
lib/Target/X86/X86SchedSandyBridge.td
test/CodeGen/X86/avx-schedule.ll
test/CodeGen/X86/bmi-schedule.ll
test/CodeGen/X86/popcnt-schedule.ll
test/CodeGen/X86/pr34080.ll
test/CodeGen/X86/recip-fastmath.ll
test/CodeGen/X86/recip-fastmath2.ll
test/CodeGen/X86/sse-schedule.ll
test/CodeGen/X86/sse2-schedule.ll
test/CodeGen/X86/sse41-schedule.ll
test/CodeGen/X86/sse42-schedule.ll
test/CodeGen/X86/x86-cmov-converter.ll