arm64: dts: qcom: sm8450: add Inline Crypto Engine registers and clock

arm64: dts: qcom: sm8450: add Inline Crypto Engine registers and clock

Add the registers and clock for the Inline Crypto Engine (ICE) to the
device tree node for the UFS host controller on sm8450.  This makes
ufs_qcom support inline encryption when CONFIG_SCSI_UFS_CRYPTO=y.

The address and size of the register range, and the minimum and maximum
frequency of the ICE core clock, all match the values used downstream.

I've validated this on an SM8450 HDK using the 'encrypt' group of
xfstests on ext4 with MOUNT_OPTIONS="-o inlinecrypt".

Signed-off-by: Eric Biggers <ebiggers@google.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220826071244.185584-1-ebiggers@kernel.org