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(parent: 158d495) | patch
arm64: mm: Fix and re-enable ARM64_SW_TTBR0_PAN
authorWill Deacon <will.deacon@arm.com>
Thu, 10 Aug 2017 12:58:16 +0000 (13:58 +0100)
committerWill Deacon <will.deacon@arm.com>
Mon, 11 Dec 2017 13:40:35 +0000 (13:40 +0000)
commit27a921e75711d924617269e0ba4adb8bae9fd0d1
treebb4db9089fb6bb5606197222704a7522d2c9b2c6tree | snapshot
parent158d495899ce55db453f682a8ac8390d5a426578commit | diff
arm64: mm: Fix and re-enable ARM64_SW_TTBR0_PAN

With the ASID now installed in TTBR1, we can re-enable ARM64_SW_TTBR0_PAN
by ensuring that we switch to a reserved ASID of zero when disabling
user access and restore the active user ASID on the uaccess enable path.

Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Tested-by: Shanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/Kconfig diff | blob | history
arch/arm64/include/asm/asm-uaccess.h diff | blob | history
arch/arm64/include/asm/uaccess.h diff | blob | history
arch/arm64/kernel/entry.S diff | blob | history
arch/arm64/lib/clear_user.S diff | blob | history
arch/arm64/lib/copy_from_user.S diff | blob | history
arch/arm64/lib/copy_in_user.S diff | blob | history
arch/arm64/lib/copy_to_user.S diff | blob | history
arch/arm64/mm/cache.S diff | blob | history
arch/arm64/xen/hypercall.S diff | blob | history
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