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drm/i915/chv: Ack interrupts before handling them (CHV)
authorOscar Mateo <oscar.mateo@intel.com>
Mon, 16 Jun 2014 15:11:00 +0000 (16:11 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 17 Jun 2014 22:49:37 +0000 (00:49 +0200)
commit27b6c122512ca30399bb1b39cc42eda83901f304
treec8e1ccfe4b566fcf19b8cf449fd64078b958bbb5
parent38cc46d73ed99dd7002f1406002e52d7975d16cc
drm/i915/chv: Ack interrupts before handling them (CHV)

Otherwise, we might receive a new interrupt before we have time to
ack the first one, eventually missing it.

Without an atomic XCHG operation with mmio space, this patch merely
reduces the window in which we can miss an interrupt (especially when
you consider how heavyweight the I915_READ/I915_WRITE operations are).

Notice that, before clearing a port-sourced interrupt in the IIR, the
corresponding interrupt source status in the PORT_HOTPLUG_STAT must be
cleared.

Spotted by Bob Beckett <robert.beckett@intel.com>.

v2:
- Add warning to commit message and comments to the code as per Chris
  Wilson's request.
- Imre Deak pointed out that the pipe underrun flag might not be signaled
  in IIR, so do not make valleyview_pipestat_irq_handler depend on it.

v3: Improve the source code comment.

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_irq.c