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ARM: KVM: add missing dsb before invalidating Stage-2 TLBs
authorMarc Zyngier <marc.zyngier@arm.com>
Fri, 21 Jun 2013 12:08:47 +0000 (13:08 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 20 Aug 2013 15:43:03 +0000 (08:43 -0700)
commit285695e4211008e0f06648c3ae7af8ba09a88399
tree44458c6c3ff6270219236ef7c7f7bbbd7cd1a219
parent921fa4d670d801e9394f843dd14e2d7faabbba4a
ARM: KVM: add missing dsb before invalidating Stage-2 TLBs

commit 479c5ae2f8a55509b691494cd13691d3dc31d102 upstream.

When performing a Stage-2 TLB invalidation, it is necessary to
make sure the write to the page tables is observable by all CPUs.

For this purpose, add a dsb instruction to __kvm_tlb_flush_vmid_ipa
before doing the TLB invalidation itself.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm/kvm/interrupts.S