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watchdog/aspeed: Fix AST2600 frequency behaviour
authorJoel Stanley <joel@jms.id.au>
Tue, 19 Nov 2019 14:12:03 +0000 (15:12 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 16 Dec 2019 10:46:34 +0000 (10:46 +0000)
commit28c80f15fc9c4c1ee980e87e693374f196aa20fe
tree803e45958f1b9fbee16adc86a0a3ea366da492e1
parentaabf1de4b7a2fb14797946f8eb970d391cecf0d8
watchdog/aspeed: Fix AST2600 frequency behaviour

The AST2600 control register sneakily changed the meaning of bit 4
without anyone noticing. It no longer controls the 1MHz vs APB clock
select, and instead always runs at 1MHz.

The AST2500 was always 1MHz too, but it retained bit 4, making it read
only. We can model both using the same fixed 1MHz calculation.

Fixes: 6b2b2a703cad ("hw: wdt_aspeed: Add AST2600 support")
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20191119141211.25716-10-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/watchdog/wdt_aspeed.c
include/hw/watchdog/wdt_aspeed.h