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(parent: 89329e9) | patch
ARM64: make sure FastISel emits SSA MachineInstrs
authorTim Northover <tnorthover@apple.com>
Thu, 8 May 2014 10:30:56 +0000 (10:30 +0000)
committerTim Northover <tnorthover@apple.com>
Thu, 8 May 2014 10:30:56 +0000 (10:30 +0000)
commit291cd09645a3bbd5dfd7ccf1039b783a1a2fa54c
treeca4248395687727799dfe644d6c1c986212499f9tree | snapshot
parent89329e902ca1dfa2908456907ba1b3ef6d66465acommit | diff
ARM64: make sure FastISel emits SSA MachineInstrs

We need to use a temporary register for a 2-step operation like REM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208297 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM64/ARM64FastISel.cpp diff | blob | history
test/CodeGen/ARM64/fast-isel-rem.ll diff | blob | history
external/llvm
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