OSDN Git Service

octeontx2-af: Return correct CGX RX fifo size
authorSubbaraya Sundeep <sbhatta@marvell.com>
Thu, 18 Mar 2021 14:15:45 +0000 (19:45 +0530)
committerDavid S. Miller <davem@davemloft.net>
Thu, 18 Mar 2021 21:12:42 +0000 (14:12 -0700)
commit297887872973555cb9fb83fdd5a2748d6cd8fc1d
tree35972ac5d9b867da9fac44d79c9c2e77fd4e864d
parentce86c2a531e2f2995ee55ea527c1f39ba1d95f73
octeontx2-af: Return correct CGX RX fifo size

CGX receive buffer size is a constant value and
cannot be read from CGX0 block always since
CGX0 may not enabled everytime. Hence return CGX
receive buffer size from first enabled CGX block
instead of CGX0.

Fixes: 6e54e1c5399a ("octeontx2-af: cn10K: MTU configuration")
Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>
Signed-off-by: Hariprasad Kelam <hkelam@marvell.com>
Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c