OSDN Git Service

[x86] add fake scalar FP logic instructions to ReplaceableInstrs to save some bytes
authorSanjay Patel <spatel@rotateright.com>
Wed, 16 Nov 2016 17:42:40 +0000 (17:42 +0000)
committerSanjay Patel <spatel@rotateright.com>
Wed, 16 Nov 2016 17:42:40 +0000 (17:42 +0000)
commit2c72e2a32cb3198e60667d495421bcb2a1eabe1b
tree240ab5429d6cee8a95d4c1ba91228325bada79a4
parent2ca233e645016cfab5badc4d967bf46c68839701
[x86] add fake scalar FP logic instructions to ReplaceableInstrs to save some bytes

We can replace "scalar" FP-bitwise-logic with other forms of bitwise-logic instructions.
Scalar SSE/AVX FP-logic instructions only exist in your imagination and/or the bowels of
compilers, but logically equivalent int, float, and double variants of bitwise-logic
instructions are reality in x86, and the float variant may be a shorter instruction
depending on which flavor (SSE or AVX) of vector ISA you have...so just prefer float all
the time.

This is a preliminary step towards solving PR6137:
https://llvm.org/bugs/show_bug.cgi?id=6137

Differential Revision:
https://reviews.llvm.org/D26712

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287122 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrInfo.cpp
test/CodeGen/X86/fast-isel-select-sse.ll
test/CodeGen/X86/fp-logic-replace.ll
test/CodeGen/X86/fp-logic.ll
test/CodeGen/X86/fp-select-cmp-and.ll
test/CodeGen/X86/sse-minmax.ll