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drm/i915/guc: New GuC scratch registers for Gen11
authorMichal Wajdeczko <michal.wajdeczko@intel.com>
Mon, 27 May 2019 18:36:05 +0000 (18:36 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Tue, 28 May 2019 09:07:12 +0000 (10:07 +0100)
commit2d4ed3a988e6b1ff9729d0edd74bf4890571253e
tree480b8b093cb2649ea58156427021c0fdb933b6b9
parent4a1f9dc119163677427fe03231af3bb0bf5adb4b
drm/i915/guc: New GuC scratch registers for Gen11

Gen11 adds new set of scratch registers that can be used for MMIO
based Host-to-Guc communication. Due to limited number of these
registers it is expected that host will use them only for command
transport buffers (CTB) communication setup if one is available.

Bspec: 21044

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190527183613.17076-10-michal.wajdeczko@intel.com
drivers/gpu/drm/i915/intel_guc.c
drivers/gpu/drm/i915/intel_guc_reg.h