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[X86] Further rearrange the setOperationAction calls to separate the ones that requir...
authorCraig Topper <craig.topper@intel.com>
Fri, 15 Dec 2017 01:03:43 +0000 (01:03 +0000)
committerCraig Topper <craig.topper@intel.com>
Fri, 15 Dec 2017 01:03:43 +0000 (01:03 +0000)
commit31be897d38a0afc9ea08dd74ba15a388a4e1bf60
tree715f5bce1e095b30231a45a7192f7c57d4d2c130
parent411b939c3c5bfef687b5daa48649130d64ab8f1a
[X86] Further rearrange the setOperationAction calls to separate the ones that require 512-bit registers OR VLX into separate sections. NFCI

We have several instructions that were introduced in AVX512F that are only available in 512-bit form on KNL. We still make use of them for 128/256 by artificially widening and extracting during isel.

This commit separates these operations from the true 512-bit operations. This way we can qualify the normal 512-bit operations with needing 512-bit register support. And these special operations will get qualified with needing 512-bit registers OR VLX.

The 512-bit register qualification will be introduced in a future patch this just gets everything grouped to minimize deltas on that patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320782 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp