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AMDGPU: Re-justify workaround and fix worked around problem
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 25 Sep 2015 17:08:42 +0000 (17:08 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 25 Sep 2015 17:08:42 +0000 (17:08 +0000)
commit323c9fbce20d10f8c9c71ed2f6b75ee7d6d198ab
tree4c8ffbc536f068482c6d37be8ea6e4b7754f44cd
parent7ba18786296fdbfd1e9725862c6a969945f9b14f
AMDGPU: Re-justify workaround and fix worked around problem

When buffer resource descriptors were built, the upper two components
of the descriptor were first composed into a 64-bit register because
legalizeOperands assumed all operands had the same register class.
Fix that problem, but keep the workaround. I'm not sure anything
actually is actually emitting such a REG_SEQUENCE now.

If multiple resource descriptors are set up with different base
pointers, this is copied with a single s_mov_b64. We probably
should fix this better by recognizing a pair of s_mov_b32 later,
but for now delete the dead code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248585 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/SIISelLowering.cpp
lib/Target/AMDGPU/SIInstrInfo.cpp