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[X86 CodeGen] Optimization of ZeroExtendLoad for v2i8 vector
authorElena Demikhovsky <elena.demikhovsky@intel.com>
Wed, 13 Sep 2017 06:40:26 +0000 (06:40 +0000)
committerElena Demikhovsky <elena.demikhovsky@intel.com>
Wed, 13 Sep 2017 06:40:26 +0000 (06:40 +0000)
commit3254c743c87df0aefff33424852df5ca3fbda277
treebe8d6c1c2208c563ee4906965bebc78a6c8bc473tree | snapshot
parent3c0fd8c54bac789e5481f466067c213f6af90182commit | diff
[X86 CodeGen] Optimization of ZeroExtendLoad for v2i8 vector

Load with zero-extend and sign-extend from v2i8 to v2i32 is "Legal" since SSE4.1 and may be performed using PMOVZXBD , PMOVSXBD instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313121 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp diff | blob | history
test/CodeGen/X86/vec_int_to_fp.ll diff | blob | history
test/CodeGen/X86/vector-sext.ll diff | blob | history
test/CodeGen/X86/vector-zext.ll diff | blob | history
external/llvm
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