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MIPS: Add 48-bit VA space (and 4-level page tables) for 4K pages.
authorAlex Belits <alex.belits@cavium.com>
Fri, 17 Feb 2017 01:27:34 +0000 (17:27 -0800)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 10 Apr 2017 09:56:06 +0000 (11:56 +0200)
commit3377e227af441aff710726437adc20efc359fd9c
treed05610ba07eca74f783b42fbbd5110b7876d8c9b
parentdfa32261fa0ed1821c7d5dbb9e93eddfe311a0d9
MIPS: Add 48-bit VA space (and 4-level page tables) for 4K pages.

Some users must have 4K pages while needing a 48-bit VA space size.
The cleanest way do do this is to go to a 4-level page table for this
case.  Each page table level using order-0 pages adds 9 bits to the
VA size (at 4K pages, so for four levels we get 9 * 4 + 12 == 48-bits.

For the 4K page size case only we add support functions for the PUD
level of the page table tree, also the TLB exception handlers get an
extra level of tree walk.

[david.daney@cavium.com: Forward port to v4.10.]
[david.daney@cavium.com: Forward port to v4.11.]

Signed-off-by: Alex Belits <alex.belits@cavium.com>
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Alex Belits <alex.belits@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/15312/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/Kconfig
arch/mips/include/asm/pgalloc.h
arch/mips/include/asm/pgtable-64.h
arch/mips/mm/init.c
arch/mips/mm/pgtable-64.c
arch/mips/mm/tlbex.c