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[ARM][ARMLoadStoreOptimizer]
authorLuke Cheeseman <luke.cheeseman@arm.com>
Mon, 24 Sep 2018 10:42:22 +0000 (10:42 +0000)
committerLuke Cheeseman <luke.cheeseman@arm.com>
Mon, 24 Sep 2018 10:42:22 +0000 (10:42 +0000)
commit33b1a96b81ba4e33cfc4a129ce43b5331e16936b
tree6d712955e80997e87acc7e736416458254d26ba2
parent2948bf4bf86331542d2829f9164d54f4fb267e3d
[ARM][ARMLoadStoreOptimizer]

- The load store optimizer is currently merging multiple loads/stores into VLDM/VSTM with more than 16 doubleword registers
- This is an UNPREDICTABLE instruction and shouldn't be done
- It looks like the Limit for how many registers included in a merge got dropped at some point so I am reintroducing it in this patch
- This fixes https://bugs.llvm.org/show_bug.cgi?id=38389

Differential Revision: https://reviews.llvm.org/D52085

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342872 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMLoadStoreOptimizer.cpp
test/CodeGen/ARM/load_store_opt_reg_limit.mir [new file with mode: 0644]