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powerpc/64e: provide an addressing macro for use with TOC in alternate register
authorNicholas Piggin <npiggin@gmail.com>
Mon, 26 Sep 2022 03:40:57 +0000 (13:40 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Wed, 28 Sep 2022 09:22:12 +0000 (19:22 +1000)
commit3569d84bb26f6f07d426446da3d2c836180f1565
tree677340fd4c7ed38f3dd3c1964aa8b270fe768192
parent8e93fb33c84f68db20c0bc2821334a4c54c3e251
powerpc/64e: provide an addressing macro for use with TOC in alternate register

The interrupt entry code carefully saves a minimal number of registers,
so in some places the TOC is required, it is loaded into a different
register, so provide a macro that can supply an alternate TOC register.

This continues to use got addressing because TOC-relative results in
"got/toc optimization is not supported" messages by the linker. Having
r2 be one of the saved registers and using that for TOC addressing may
be the best way to avoid that and switch this to TOC addressing.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220926034057.2360083-6-npiggin@gmail.com
arch/powerpc/include/asm/ppc_asm.h
arch/powerpc/kernel/exceptions-64e.S
arch/powerpc/mm/nohash/tlb_low_64e.S