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drm/i915: Fix DPLCLKA_CFGCR0 bits for Port F.
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Mon, 29 Jan 2018 23:22:18 +0000 (15:22 -0800)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 30 Jan 2018 18:24:17 +0000 (10:24 -0800)
commit376faf8a3b2ff497b1f1583ab4b23bc650711764
treeb87f23a08b7b4f2e49561db1ccd00560c365518c
parent8f942ed00efe9f6626031521c439070cca47b364
drm/i915: Fix DPLCLKA_CFGCR0 bits for Port F.

Since when it got introduced with commit '555e38d27317
("drm/i915/cnl: DDI - PLL mapping")' the support for Port F
was wrong, because Port F bits are far from bits used
for A to E.

Since Port F is not used so far we don't need to propagate
Fixes back there.

v2: Reuse _SHIFT definition to avoid complicated duplication (DK).

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180129232223.766-5-rodrigo.vivi@intel.com
drivers/gpu/drm/i915/i915_reg.h