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(parent: f659c36) | patch
[Hexagon] Improve scheduling based on register pressure
authorKrzysztof Parzyszek <kparzysz@codeaurora.org>
Tue, 20 Mar 2018 12:28:43 +0000 (12:28 +0000)
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>
Tue, 20 Mar 2018 12:28:43 +0000 (12:28 +0000)
commit38b58f1b4f405e9be9c219c69a28382eae7b4603
treea2db7e90813fabb671b002610a0c4a9c7e1f2fe9tree | snapshot
parentf659c36f7f5587492a4aedf0f581138e1d80629dcommit | diff
[Hexagon] Improve scheduling based on register pressure

Patch by Brendon Cahoon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327975 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Hexagon/HexagonHazardRecognizer.cpp diff | blob | history
lib/Target/Hexagon/HexagonMachineScheduler.cpp diff | blob | history
lib/Target/Hexagon/HexagonMachineScheduler.h diff | blob | history
lib/Target/Hexagon/HexagonSubtarget.cpp diff | blob | history
test/CodeGen/Hexagon/autohvx/isel-expand-unaligned-loads.ll diff | blob | history
test/CodeGen/Hexagon/ifcvt-diamond-bug-2016-08-26.ll diff | blob | history
test/CodeGen/Hexagon/swp-stages4.ll diff | blob | history
external/llvm
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