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[AArch64][SVE] Asm: Support for FP conversion instructions.
authorSander de Smalen <sander.desmalen@arm.com>
Wed, 4 Jul 2018 12:13:17 +0000 (12:13 +0000)
committerSander de Smalen <sander.desmalen@arm.com>
Wed, 4 Jul 2018 12:13:17 +0000 (12:13 +0000)
commit3b4c054b7b973aa4f94f940f9dacb11b8061d9ee
tree811679ebd6dd2438074d4c27ae84e59bef0ec33d
parentc7d6f7ca768da421de62d52741ec723855acec64
[AArch64][SVE] Asm: Support for FP conversion instructions.

The variants added are:

- fcvt   (FP convert precision)
- scvtf  (signed int -> FP)
- ucvtf  (unsigned int -> FP)
- fcvtzs (FP -> signed int (round to zero))
- fcvtzu (FP -> unsigned int (round to zero))

For example:
  fcvt   z0.h, p0/m, z0.s  (single- to half-precision FP)
  scvtf  z0.h, p0/m, z0.s  (32-bit int to half-precision FP)
  ucvtf  z0.h, p0/m, z0.s  (32-bit unsigned int to half-precision FP)
  fcvtzs z0.s, p0/m, z0.h  (half-precision FP to 32-bit int)
  fcvtzu z0.s, p0/m, z0.h  (half-precision FP to 32-bit unsigned int)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336265 91177308-0d34-0410-b5e6-96231b3b80d8
12 files changed:
lib/Target/AArch64/AArch64SVEInstrInfo.td
lib/Target/AArch64/SVEInstrFormats.td
test/MC/AArch64/SVE/fcvt-diagnostics.s [new file with mode: 0644]
test/MC/AArch64/SVE/fcvt.s [new file with mode: 0644]
test/MC/AArch64/SVE/fcvtzs-diagnostics.s [new file with mode: 0644]
test/MC/AArch64/SVE/fcvtzs.s [new file with mode: 0644]
test/MC/AArch64/SVE/fcvtzu-diagnostics.s [new file with mode: 0644]
test/MC/AArch64/SVE/fcvtzu.s [new file with mode: 0644]
test/MC/AArch64/SVE/scvtf-diagnostics.s [new file with mode: 0644]
test/MC/AArch64/SVE/scvtf.s [new file with mode: 0644]
test/MC/AArch64/SVE/ucvtf-diagnostics.s [new file with mode: 0644]
test/MC/AArch64/SVE/ucvtf.s [new file with mode: 0644]