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drm/i915/cnp: Display Wa #1179: WaHardHangonHotPlug
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 19 Sep 2017 21:57:03 +0000 (14:57 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 19 Sep 2017 23:04:56 +0000 (16:04 -0700)
commit3b92e263dd4a38fa168d12a55ea4c8193483b884
tree1c9fabfa5a9c6bb7a77e3d4a84ae4d4c06a5765c
parentfb5f4e96fdf9cb7ec5e6a590e1c3fdc3b6fd1e01
drm/i915/cnp: Display Wa #1179: WaHardHangonHotPlug

"CNL PCH chance of hang when software accesses south display
registers after hotplug is enabled.
Workaround: Program 0xC2000 bits 11:8 = 0xF before enabling
south display hotplug detection."

"Workaround only needs to be applied to pre-production steppings
used in graphics capable SKUs, but it is easier to apply to
everything, and does not hurt."

v2: Moving from clock gating to right before enabling
    SHOTPLUG_CTL as it should be.
v3: Align with SOUTH_CHICKEN1 (DK) and consequently use proper
    spaces on bits definition since other bits around already use
    new style. And now that checkpatch is not noise anymore I also
    fixed the reg read mask to avoid going over 80 chars.

Suggested-by: Ben Widawsky <ben@bwidawsk.net>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170919215703.25947-1-rodrigo.vivi@intel.com
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/i915_reg.h