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drm/i915: Support for higher DSI clk
authorGaurav K Singh <gaurav.k.singh@intel.com>
Wed, 1 Jul 2015 12:58:51 +0000 (15:58 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 3 Jul 2015 05:39:01 +0000 (07:39 +0200)
commit3c5c6d88855baf9c3b9aa6243a37bb179f5a737e
treeb570cb9aef9da960072051580eacf3aa31cbf4c3
parent260c1ad1993d3f17e25c5d848d6d2525ff38913c
drm/i915: Support for higher DSI clk

For MIPI panels requiring higher DSI clk, values needs to be added
in lfsr_converts table for getting the correct values of pll ctrl
and dividor values which gets programmed in cck regs, otherwise DSI
PLL does not get locked leading to no display on the MIPI panel.

Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dsi_pll.c