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drm/i915: Program chicken bit during DP MST sequence on TGL+
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 23 Jul 2021 17:06:18 +0000 (10:06 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Sat, 24 Jul 2021 02:57:25 +0000 (19:57 -0700)
commit3c73553f56cdbf2df5af574b3066e2bd7d16e2f7
tree5c8e1476a60a75ca49ea0b48975f6fb4e9adff47
parent9b52aa720168859526bf90d77fa210fc0336f170
drm/i915: Program chicken bit during DP MST sequence on TGL+

A new step has been added to the DP modeset sequences for all platforms
with display version 12 and beyond:  if enabling DP MST with FEC, we
need to set a chicken bit before enabling the transcoder.  The chicken
bit should be disabled again before disabling the transcoder (which we
can do unconditionally since it shouldn't be set anyway in non-MST
cases).

Bspec: 49190, 54128, 55424
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210723170618.1477415-1-matthew.d.roper@intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_dp_mst.c
drivers/gpu/drm/i915/i915_reg.h