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[X86] Add patterns to turn an insert into lower subvector of a zero vector into a...
authorCraig Topper <craig.topper@intel.com>
Sun, 3 Sep 2017 17:52:25 +0000 (17:52 +0000)
committerCraig Topper <craig.topper@intel.com>
Sun, 3 Sep 2017 17:52:25 +0000 (17:52 +0000)
commit3cef9810b2ae6dd91c1cf211b47c8d838783196f
treef99c39c862e6e527a9af38245a720213d6c3db5e
parent849412352b3a21604404ca27f60a6e059b05ad86
[X86] Add patterns to turn an insert into lower subvector of a zero vector into a move instruction which will implicitly zero the upper elements.

Ideally we'd be able to emit the SUBREG_TO_REG without the explicit register->register move, but we'd need to be sure the producing operation would select something that guaranteed the upper bits were already zeroed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312450 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrAVX512.td
lib/Target/X86/X86InstrSSE.td
test/CodeGen/X86/avx-intrinsics-fast-isel.ll
test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
test/CodeGen/X86/compress_expand.ll
test/CodeGen/X86/madd.ll
test/CodeGen/X86/masked_gather_scatter.ll
test/CodeGen/X86/merge-consecutive-loads-256.ll
test/CodeGen/X86/merge-consecutive-loads-512.ll
test/CodeGen/X86/vector-shuffle-variable-256.ll