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author	Tim Northover <tnorthover@apple.com>
	Thu, 15 Sep 2016 10:09:59 +0000 (10:09 +0000)
committer	Tim Northover <tnorthover@apple.com>
	Thu, 15 Sep 2016 10:09:59 +0000 (10:09 +0000)
commit	3d94178ab674a1a37adb4170d99fd2d1cb90a673
tree	5080fcdb42072ed5894bf1b6d91246a9f5b778af	tree \| snapshot
parent	ccc7ec7f4280176347ff5140aee63b5e28f31fb2	commit \| diff

GlobalISel: remove "unsized" LLT

It was only really there as a sentinel when instructions had to have precisely
one type. Now that registers are typed, each register really has to have a type
that is sized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281599 91177308-0d34-0410-b5e6-96231b3b80d8

external/llvm

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include/llvm/CodeGen/LowLevelType.h		diff \| blob \| history
lib/CodeGen/GlobalISel/RegisterBankInfo.cpp		diff \| blob \| history
lib/CodeGen/LowLevelType.cpp		diff \| blob \| history
lib/CodeGen/MIRParser/MIParser.cpp		diff \| blob \| history
lib/CodeGen/MachineRegisterInfo.cpp		diff \| blob \| history
lib/CodeGen/MachineVerifier.cpp		diff \| blob \| history
lib/Target/AArch64/AArch64InstructionSelector.cpp		diff \| blob \| history
lib/Target/AArch64/AArch64MachineLegalizer.cpp		diff \| blob \| history
lib/Target/AArch64/AArch64RegisterBankInfo.cpp		diff \| blob \| history
unittests/CodeGen/LowLevelTypeTest.cpp		diff \| blob \| history