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[X86][AVX2] Hide VPBLENDD instructions behind AVX2 predicate
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 19 Feb 2019 17:23:55 +0000 (17:23 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 19 Feb 2019 17:23:55 +0000 (17:23 +0000)
commit3e38505d0613c6d284201665f018135a643b5f8d
tree5bf3e8400c8f375110a4a19e6d1b172348eaf9f2
parentbe849ca61f09d3c048ca39146df12f144d68264a
[X86][AVX2] Hide VPBLENDD instructions behind AVX2 predicate

This was the cause of the regression in D57888 - the commuted load pattern wasn't hidden by the predicate so once we enabled v4i32 blends on SSE41+ targets then isel was incorrectly matched against AVX2+ instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354358 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrSSE.td