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perf/x86: Implement immediate enforcement of /sys/devices/cpu/rdpmc value of 0
authorAnthony Steinhauser <asteinhauser@google.com>
Mon, 25 Nov 2019 05:48:38 +0000 (21:48 -0800)
committerIngo Molnar <mingo@kernel.org>
Wed, 27 Nov 2019 09:32:11 +0000 (10:32 +0100)
commit405b45376de90b3027aaf8c4de035c6bb721fa7e
tree457cff1da7ed350437a998e68941655a60c71711
parent89d57dddd7d319ded00415790a0bb3c954b7e386
perf/x86: Implement immediate enforcement of /sys/devices/cpu/rdpmc value of 0

When you successfully write 0 to /sys/devices/cpu/rdpmc, the RDPMC
instruction should be disabled unconditionally and immediately (after you
close the SYSFS file) by the documentation.

Instead, in the current implementation the PMU must be reloaded which
happens only eventually some time in the future. Only after that the RDPMC
instruction becomes disabled (on ring 3) on the respective core.

This change makes the treatment of the 0 value as blocking and as
unconditional as the current treatment of the 2 value, only the CR4.PCE
bit is naturally set to false instead of true.

Signed-off-by: Anthony Steinhauser <asteinhauser@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: acme@kernel.org
Link: https://lkml.kernel.org/r/20191125054838.137615-1-asteinhauser@google.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/events/core.c
arch/x86/include/asm/mmu_context.h