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dt-bindings: riscv: explicitly mention assumption of Zicsr & Zifencei support
authorConor Dooley <conor.dooley@microchip.com>
Thu, 27 Apr 2023 10:43:42 +0000 (11:43 +0100)
committerPalmer Dabbelt <palmer@rivosinc.com>
Mon, 1 May 2023 23:57:18 +0000 (16:57 -0700)
commit41ebfc91f785c202e8e8f9bd2f67154efad6287e
treea93c94c68e1f86ffab42a03a93c01164099cd257
parentf9c4bbddece7eff1155c70d48e3c9c2a01b9d778
dt-bindings: riscv: explicitly mention assumption of Zicsr & Zifencei support

The dt-binding was defined before the extraction of csr access and
fence.i into their own extensions, and thus the presence of the I
base extension implies Zicsr and Zifencei.
There's no harm in adding them obviously, but for backwards
compatibility with DTs that existed prior to that extraction, software
is unable to differentiate between "i" and "i_zicsr_zifencei" without
any further information.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230427-fence-blurred-c92fb69d4137@wendy
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/devicetree/bindings/riscv/cpus.yaml