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RISC-V: Remove unused class definitions
authorMichael Clark <mjc@sifive.com>
Sun, 4 Mar 2018 00:27:37 +0000 (13:27 +1300)
committerMichael Clark <mjc@sifive.com>
Sat, 5 May 2018 22:39:38 +0000 (10:39 +1200)
commit42b3a4b7ccbbf419df926939b273fe3b8a6dca1f
tree30151c785ec50bea8038d92dda9d85930a934474
parentb7938980fbd3209fd94b17c98c54ec044b762417
RISC-V: Remove unused class definitions

Removes a whole lot of unnecessary boilerplate code. Machines
don't need to be objects. The expansion of the SOC object model
for the RISC-V machines will happen in the future as SiFive
plans to add their FE310 and FU540 SOCs to QEMU. However, it
seems that this present boilerplate is complete unnecessary.

Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Michael Clark <mjc@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
hw/riscv/riscv_hart.c
hw/riscv/sifive_e.c
hw/riscv/sifive_u.c
hw/riscv/spike.c
hw/riscv/virt.c
include/hw/riscv/sifive_e.h
include/hw/riscv/sifive_u.h
include/hw/riscv/spike.h
include/hw/riscv/virt.h