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[SystemZ] Support vector registers in inline asm
authorUlrich Weigand <ulrich.weigand@de.ibm.com>
Fri, 2 Mar 2018 20:36:34 +0000 (20:36 +0000)
committerUlrich Weigand <ulrich.weigand@de.ibm.com>
Fri, 2 Mar 2018 20:36:34 +0000 (20:36 +0000)
commit43f4824b432a60e885ec2bde55cc29a5c9a13593
treec4dae8799484995768b042dd44dd86d2186e2factree | snapshot
parenta1ef0f7b4bc19a026198e186e23a69d43491ef1fcommit | diff
[SystemZ] Support vector registers in inline asm

This adds support for specifying vector registers for use with inline
asm statements, either via the 'v' constraint or by explicit register
names (v0 ... v31).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326609 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/SystemZ/SystemZISelLowering.cpp diff | blob | history
lib/Target/SystemZ/SystemZRegisterInfo.td diff | blob | history
test/CodeGen/SystemZ/asm-19.ll [new file with mode: 0644] blob
external/llvm
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