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(parent: 2a1a703) | patch
clk: ingenic/jz4770: Fix incorrect dividers for main clocks
authorPaul Cercueil <paul@crapouillou.net>
Thu, 2 May 2019 21:25:00 +0000 (23:25 +0200)
committerStephen Boyd <sboyd@kernel.org>
Fri, 7 Jun 2019 18:49:00 +0000 (11:49 -0700)
commit44b06a76ad330f327fe2366472a83d7d1d06d86e
treead5a6bad4ec6a9de0290726880b483e6bf6634bbtree | snapshot
parent2a1a703635a01a98d36cd5c8079dd49c1e006cf6commit | diff
clk: ingenic/jz4770: Fix incorrect dividers for main clocks

The main clocks (cclk, h0clk, h1clk, h2clk, c1clk, pclk) were using
incorrect dividers, and thus reported an incorrect rate.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/ingenic/jz4770-cgu.c diff | blob | history
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