OSDN Git Service

net/mlx5e: Support LAG TX port affinity distribution
authorMaxim Mikityanskiy <maximmi@mellanox.com>
Wed, 7 Aug 2019 14:46:15 +0000 (17:46 +0300)
committerSaeed Mahameed <saeedm@mellanox.com>
Wed, 28 Aug 2019 18:49:03 +0000 (11:49 -0700)
commit45f171b1182b9c4ab6d854d6f7fd7dd771fed591
treef43c3c30cd36dd10537fe3b29ae9c30d8cbb6008
parent3c14562663c603bc523b6619a2b19a411e1cdc8e
net/mlx5e: Support LAG TX port affinity distribution

When the VF LAG is in use, round-robin the TX affinity of channels among
the different ports, if supported by the firmware. Create a set of TISes
per port, while doing round-robin of the channels over the different
sets. Let all SQs of a channel share the same set of TISes.

If lag_tx_port_affinity HCA cap bit is supported, num_lag_ports > 1 and
we aren't the LACP owner (PF in the regular use), assign the affinities,
otherwise use tx_affinity == 0 in TIS context to let the FW assign the
affinities itself. The TISes of the LACP owner are mapped only to the
native physical port.

For VFs, the starting port for round-robin is determined by its vhca_id,
because a VF may have only one channel if attached to a single-core VM.

Signed-off-by: Maxim Mikityanskiy <maximmi@mellanox.com>
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Mark Bloch <markb@mellanox.com>
Reviewed-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/en.h
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c
drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c