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clk: sunxi-ng: v3s: use sigma-delta modulation for audio-pll
authorTobias Schramm <t.schramm@manjaro.org>
Thu, 18 Feb 2021 11:20:01 +0000 (12:20 +0100)
committerMaxime Ripard <maxime@cerno.tech>
Sat, 6 Mar 2021 07:41:00 +0000 (15:41 +0800)
commit46060be6d8400ac0e1965b90a29fde96981a2ba7
treec6fab9d0403c30e981d9a377083fc24f223f943c
parenta38fd8748464831584a19438cbb3082b5a2dab15
clk: sunxi-ng: v3s: use sigma-delta modulation for audio-pll

Previously it was not possible to achieve clock rates of 24.576MHz and
22.5792MHz, which are commonly required core clocks for the i2s
peripheral of v3s based SoCs.

Add support for those clock rates through the audio pll's sigma-delta
modulator.

Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210218112001.479018-2-t.schramm@manjaro.org
drivers/clk/sunxi-ng/ccu-sun8i-v3s.c