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author	Reza Amini <Reza.Amini@amd.com>
	Wed, 15 Jul 2020 15:33:23 +0000 (11:33 -0400)
committer	Alex Deucher <alexander.deucher@amd.com>
	Thu, 6 Aug 2020 20:40:18 +0000 (16:40 -0400)
commit	471c1dd9546df81d259664ac3e2ab0e99169f755
tree	9c7dfcbbaeedbe03a8cd923733a09745e289d774	tree \| snapshot
parent	6b6352dd1f96ca2464d7373557cb913f00c9e6dd	commit \| diff

drm/amd/display: Allow asic specific FSFT timing optimization

[Why]
Each asic can optimize best based on its capabilities

[How]
Optimizing timing for a new pixel clock

Signed-off-by: Reza Amini <Reza.Amini@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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drivers/gpu/drm/amd/display/dc/core/dc_stream.c		diff \| blob \| history
drivers/gpu/drm/amd/display/dc/dc_stream.h		diff \| blob \| history
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c		diff \| blob \| history
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h		diff \| blob \| history
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c		diff \| blob \| history
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_init.c		diff \| blob \| history
drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h		diff \| blob \| history
drivers/gpu/drm/amd/display/modules/freesync/freesync.c		diff \| blob \| history