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perf/x86/lbr: Remove cpuc->lbr_xsave allocation from atomic context
authorLike Xu <like.xu@linux.intel.com>
Fri, 30 Apr 2021 05:22:47 +0000 (13:22 +0800)
committerPeter Zijlstra <peterz@infradead.org>
Tue, 18 May 2021 10:53:47 +0000 (12:53 +0200)
commit488e13a489e9707a7e81e1991fdd1f20c0f04689
tree879e930522ad4021a4118c8ff0e9d5ae0d869917
parent3317c26a4b413b41364f2c4b83c778c6aba1576d
perf/x86/lbr: Remove cpuc->lbr_xsave allocation from atomic context

If the kernel is compiled with the CONFIG_LOCKDEP option, the conditional
might_sleep_if() deep in kmem_cache_alloc() will generate the following
trace, and potentially cause a deadlock when another LBR event is added:

  [] BUG: sleeping function called from invalid context at include/linux/sched/mm.h:196
  [] Call Trace:
  []  kmem_cache_alloc+0x36/0x250
  []  intel_pmu_lbr_add+0x152/0x170
  []  x86_pmu_add+0x83/0xd0

Make it symmetric with the release_lbr_buffers() call and mirror the
existing DS buffers.

Fixes: c085fb8774 ("perf/x86/intel/lbr: Support XSAVES for arch LBR read")
Signed-off-by: Like Xu <like.xu@linux.intel.com>
[peterz: simplified]
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: Kan Liang <kan.liang@linux.intel.com>
Link: https://lkml.kernel.org/r/20210430052247.3079672-2-like.xu@linux.intel.com
arch/x86/events/core.c
arch/x86/events/intel/lbr.c
arch/x86/events/perf_event.h