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ARM: dts: omap5: Add l4 interconnect hierarchy and ti-sysc data
authorTony Lindgren <tony@atomide.com>
Fri, 9 Nov 2018 21:41:13 +0000 (13:41 -0800)
committerTony Lindgren <tony@atomide.com>
Fri, 9 Nov 2018 21:41:13 +0000 (13:41 -0800)
commit4c387984618fe65d87384ca2725661715607bec9
treefb5d806c41934c1706966d41feeb580a5fffb31f
parent10aee7aeebe8107cd0cc6fefadc1df67ed670461
ARM: dts: omap5: Add l4 interconnect hierarchy and ti-sysc data

Similar to commit 8f42cb7f64c7 ("ARM: dts: omap4: Add l4 interconnect
hierarchy and ti-sysc data"), let's add proper interconnect hierarchy
for l4 interconnect instances with the related ti-sysc interconnect
module data as in Documentation/devicetree/bindings/bus/ti-sysc.txt.

Using ti-sysc driver binding allows us to start dropping legacy platform
data in arch/arm/mach-omap2/omap*hwmod*data.c files later on in favor of
ti-sysc dts data.

This data is generated based on platform data from a booted system
and the interconnect acces protection registers for ranges. To avoid
regressions, we initially validate the device tree provided data
against the existing platform data on boot.

Cc: devicetree@vger.kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/omap5-l4.dtsi [new file with mode: 0644]
arch/arm/boot/dts/omap5.dtsi