OSDN Git Service

Switch the license of all files explicitly copyright the FSF
authorbrobecke <brobecke>
Fri, 24 Aug 2007 14:28:34 +0000 (14:28 +0000)
committerbrobecke <brobecke>
Fri, 24 Aug 2007 14:28:34 +0000 (14:28 +0000)
commit4cb98af0e89916d5527051073ad458004c158318
treefbb57c59111208d2af94683f3dd4b741ff4857b5
parent60bd27f55c94e1ea3479b9813a2b5bc3d850a9eb
    Switch the license of all files explicitly copyright the FSF
        to GPLv3.
232 files changed:
sim/arm/Makefile.in
sim/arm/iwmmxt.c
sim/arm/iwmmxt.h
sim/arm/maverick.c
sim/arm/wrapper.c
sim/common/Make-common.in
sim/common/Makefile.in
sim/common/callback.c
sim/common/cgen-cpu.h
sim/common/cgen-defs.h
sim/common/cgen-engine.h
sim/common/cgen-mem.h
sim/common/cgen-ops.h
sim/common/cgen-par.c
sim/common/cgen-par.h
sim/common/cgen-run.c
sim/common/cgen-scache.c
sim/common/cgen-scache.h
sim/common/cgen-sim.h
sim/common/cgen-trace.c
sim/common/cgen-trace.h
sim/common/cgen-types.h
sim/common/cgen-utils.c
sim/common/dv-core.c
sim/common/dv-glue.c
sim/common/dv-pal.c
sim/common/dv-sockser.c
sim/common/dv-sockser.h
sim/common/genmloop.sh
sim/common/hw-alloc.c
sim/common/hw-alloc.h
sim/common/hw-base.c
sim/common/hw-base.h
sim/common/hw-device.c
sim/common/hw-device.h
sim/common/hw-events.c
sim/common/hw-events.h
sim/common/hw-handles.c
sim/common/hw-handles.h
sim/common/hw-instances.c
sim/common/hw-instances.h
sim/common/hw-main.h
sim/common/hw-ports.c
sim/common/hw-ports.h
sim/common/hw-properties.c
sim/common/hw-properties.h
sim/common/hw-tree.c
sim/common/hw-tree.h
sim/common/nrun.c
sim/common/run-sim.h
sim/common/run.c
sim/common/sim-abort.c
sim/common/sim-alu.h
sim/common/sim-arange.c
sim/common/sim-arange.h
sim/common/sim-assert.h
sim/common/sim-base.h
sim/common/sim-basics.h
sim/common/sim-bits.c
sim/common/sim-bits.h
sim/common/sim-config.c
sim/common/sim-config.h
sim/common/sim-core.c
sim/common/sim-core.h
sim/common/sim-cpu.c
sim/common/sim-cpu.h
sim/common/sim-endian.c
sim/common/sim-endian.h
sim/common/sim-engine.c
sim/common/sim-engine.h
sim/common/sim-events.c
sim/common/sim-events.h
sim/common/sim-fpu.c
sim/common/sim-fpu.h
sim/common/sim-hload.c
sim/common/sim-hrw.c
sim/common/sim-hw.c
sim/common/sim-hw.h
sim/common/sim-info.c
sim/common/sim-inline.c
sim/common/sim-inline.h
sim/common/sim-io.c
sim/common/sim-io.h
sim/common/sim-load.c
sim/common/sim-memopt.c
sim/common/sim-memopt.h
sim/common/sim-model.c
sim/common/sim-model.h
sim/common/sim-module.c
sim/common/sim-module.h
sim/common/sim-n-bits.h
sim/common/sim-n-core.h
sim/common/sim-n-endian.h
sim/common/sim-options.c
sim/common/sim-options.h
sim/common/sim-profile.c
sim/common/sim-profile.h
sim/common/sim-reason.c
sim/common/sim-reg.c
sim/common/sim-resume.c
sim/common/sim-run.c
sim/common/sim-signal.c
sim/common/sim-signal.h
sim/common/sim-stop.c
sim/common/sim-trace.c
sim/common/sim-trace.h
sim/common/sim-types.h
sim/common/sim-utils.c
sim/common/sim-utils.h
sim/common/sim-watch.c
sim/common/sim-watch.h
sim/common/syscall.c
sim/cris/Makefile.in
sim/cris/arch.c
sim/cris/arch.h
sim/cris/cpuall.h
sim/cris/cpuv10.c
sim/cris/cpuv10.h
sim/cris/cpuv32.c
sim/cris/cpuv32.h
sim/cris/cris-desc.c
sim/cris/cris-desc.h
sim/cris/cris-opc.h
sim/cris/cris-sim.h
sim/cris/cris-tmpl.c
sim/cris/crisv10f.c
sim/cris/crisv32f.c
sim/cris/decodev10.c
sim/cris/decodev10.h
sim/cris/decodev32.c
sim/cris/decodev32.h
sim/cris/devices.c
sim/cris/dv-cris.c
sim/cris/dv-rv.c
sim/cris/mloop.in
sim/cris/modelv10.c
sim/cris/modelv32.c
sim/cris/rvdummy.c
sim/cris/semcrisv10f-switch.c
sim/cris/semcrisv32f-switch.c
sim/cris/sim-if.c
sim/cris/sim-main.h
sim/cris/tconfig.in
sim/cris/traps.c
sim/d10v/Makefile.in
sim/erc32/Makefile.in
sim/frv/Makefile.in
sim/frv/arch.c
sim/frv/arch.h
sim/frv/cache.c
sim/frv/cache.h
sim/frv/cpu.c
sim/frv/cpu.h
sim/frv/cpuall.h
sim/frv/decode.c
sim/frv/decode.h
sim/frv/devices.c
sim/frv/frv-sim.h
sim/frv/frv.c
sim/frv/interrupts.c
sim/frv/memory.c
sim/frv/mloop.in
sim/frv/model.c
sim/frv/options.c
sim/frv/pipeline.c
sim/frv/profile-fr400.c
sim/frv/profile-fr400.h
sim/frv/profile-fr450.c
sim/frv/profile-fr500.c
sim/frv/profile-fr500.h
sim/frv/profile-fr550.c
sim/frv/profile-fr550.h
sim/frv/profile.c
sim/frv/profile.h
sim/frv/registers.c
sim/frv/registers.h
sim/frv/reset.c
sim/frv/sem.c
sim/frv/sim-if.c
sim/frv/sim-main.h
sim/frv/traps.c
sim/h8300/Makefile.in
sim/igen/Makefile.in
sim/igen/filter.c
sim/igen/filter.h
sim/igen/filter_host.c
sim/igen/filter_host.h
sim/igen/gen-engine.c
sim/igen/gen-engine.h
sim/igen/gen-icache.c
sim/igen/gen-icache.h
sim/igen/gen-idecode.c
sim/igen/gen-idecode.h
sim/igen/gen-itable.c
sim/igen/gen-itable.h
sim/igen/gen-model.c
sim/igen/gen-model.h
sim/igen/gen-semantics.c
sim/igen/gen-semantics.h
sim/igen/gen-support.c
sim/igen/gen-support.h
sim/igen/gen.c
sim/igen/gen.h
sim/igen/igen.c
sim/igen/igen.h
sim/igen/ld-cache.c
sim/igen/ld-cache.h
sim/igen/ld-decode.c
sim/igen/ld-decode.h
sim/igen/ld-insn.c
sim/igen/ld-insn.h
sim/igen/lf.c
sim/igen/lf.h
sim/igen/misc.c
sim/igen/misc.h
sim/igen/table.c
sim/igen/table.h
sim/iq2000/Makefile.in
sim/iq2000/arch.c
sim/iq2000/arch.h
sim/iq2000/cpu.c
sim/iq2000/cpu.h
sim/iq2000/cpuall.h
sim/iq2000/decode.c
sim/iq2000/decode.h
sim/iq2000/iq2000-sim.h
sim/iq2000/iq2000.c
sim/iq2000/mloop.in
sim/iq2000/model.c
sim/iq2000/sem-switch.c
sim/iq2000/sem.c
sim/iq2000/sim-if.c