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PCI: xilinx-cpm: Add Versal CPM Root Port driver
authorBharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Tue, 16 Jun 2020 12:56:54 +0000 (18:26 +0530)
committerBjorn Helgaas <bhelgaas@google.com>
Wed, 5 Aug 2020 22:09:15 +0000 (17:09 -0500)
commit508f610648b97012d39f97590e3f3f1059471607
tree322dc138439194f7544dd3d172f7c6d29d85277d
parente22fadb1d014e0fd7e43a3af667b2e3ec1a85c1f
PCI: xilinx-cpm: Add Versal CPM Root Port driver

Add support for Versal CPM as Root Port.

The Versal ACAP devices include CCIX-PCIe Module (CPM). The integrated
block for CPM along with the integrated bridge can function as PCIe Root
Port.

Bridge error and legacy interrupts in Versal CPM are handled using Versal
CPM specific interrupt line.

[bhelgaas: fold in kerneldoc fix from
https://lore.kernel.org/linux-acpi/20200729201224.26799-7-krzk@kernel.org/]
Link: https://lore.kernel.org/r/1592312214-9347-3-git-send-email-bharat.kumar.gogada@xilinx.com
Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rob Herring <robh@kernel.org>
drivers/pci/controller/Kconfig
drivers/pci/controller/Makefile
drivers/pci/controller/pcie-xilinx-cpm.c [new file with mode: 0644]