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AMDGPU: allow specifying a workgroup size that needs to fit in a compute unit
authorTom Stellard <thomas.stellard@amd.com>
Thu, 14 Apr 2016 16:27:07 +0000 (16:27 +0000)
committerTom Stellard <thomas.stellard@amd.com>
Thu, 14 Apr 2016 16:27:07 +0000 (16:27 +0000)
commit510a2b9622fa6a99fed1110eba30ea095ea1fff4
tree2b3a41c75b545018d3aa2694df4c7355005e216e
parentd5f7d71de6bd8d591e5501a990cd6fe1418c976e
AMDGPU: allow specifying a workgroup size that needs to fit in a compute unit

Summary:
For GL_ARB_compute_shader we need to support workgroup sizes of at least 1024. However, if we want to allow large workgroup sizes, we may need to use less registers, as we have to run more waves per SIMD.

This patch adds an attribute to specify the maximum work group size the compiled program needs to support. It defaults, to 256, as that has no wave restrictions.

Reducing the number of registers available is done similarly to how the registers were reserved for chips with the sgpr init bug.

Reviewers: mareko, arsenm, tstellarAMD, nhaehnle

Subscribers: FireBurn, kerberizer, llvm-commits, arsenm

Differential Revision: http://reviews.llvm.org/D18340

Patch By: Bas Nieuwenhuizen

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266337 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/Support/MathExtras.h
lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
lib/Target/AMDGPU/SIMachineFunctionInfo.h
lib/Target/AMDGPU/SIRegisterInfo.cpp
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
test/CodeGen/AMDGPU/large-work-group-promote-alloca.ll [new file with mode: 0644]
test/CodeGen/AMDGPU/large-work-group-registers.ll [new file with mode: 0644]