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(parent: 98db7a5) | patch
target/mips/mxu: Add D32ADDC instruction
authorSiarhei Volkau <lis8215@gmail.com>
Thu, 8 Jun 2023 10:42:06 +0000 (13:42 +0300)
committerPhilippe Mathieu-Daudé <philmd@linaro.org>
Mon, 10 Jul 2023 21:33:38 +0000 (23:33 +0200)
commit513cfdae7a45a705f2fb2919ad95c82f66169c6e
tree388948fde3a3f34e519a57e454ed10e2fac3c26dtree | snapshot
parent98db7a585eb402579d2e5a7ec2b04fa22d12490acommit | diff
target/mips/mxu: Add D32ADDC instruction

The instruction adds two 32-bit values with respect
to corresponding carry flags in MXU_CR.
XRa += XRb + LeftCarry flag;
XRd += XRc + RightCarry flag;
Suddenly, it doesn't modify carry flags as a result of addition.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Message-Id: <20230608104222.1520143-18-lis8215@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
target/mips/tcg/mxu_translate.c diff | blob | history
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